1. Technical Field
The present disclosure relates generally to a power conversion system and a method of operating the same, and more particularly to a power conversion system with a dual-buck inverter and a method of operating the same.
2. Description of Related Art
Reference is made to FIG. 1 which is a block diagram of a related art dual-buck inverter. The dual-buck inverter receives a DC input voltage Vdc, and converts the DC input voltage Vdc into an AC output voltage Vac. The dual-buck inverter includes two buck circuits, namely, a first buck circuit BC1 and a second buck circuit BC2. The first buck circuit BC1 mainly has a first bridge arm Lg1a and a second bridge arm Lg2a. The first bridge arm Lg1a has a first switch S1a and a first diode D1a connected in series to the first switch S1a. The second bridge arm Lg2a has a second switch S2a and a second diode D2a connected in series to the second switch S2a. The second buck circuit BC2 mainly has a third bridge arm Lg3a and a fourth bridge arm Lg4a. The third bridge arm Lg3a has a third switch S3a and a third diode D3a connected in series to the third switch S3a. The fourth bridge arm Lg4a has a fourth switch S4a and a fourth diode D4a connected in series to the fourth switch S4a. Also, the first buck circuit BC1 and the second buck circuit BC2 are connected in parallel to an input capacitor C1a. 
Reference is made to FIG. 2 which is a schematic waveform graph of driving signals for controlling the prior art dual-buck inverter. A driving signal generating circuit (not shown) is provided to produce a plurality of control signals, namely a first control signal Sca1, a second control signal Sca2, a third control signal Sca3, and a fourth control signal Sca4 to correspondingly control the first switch S1a, the second switch S2a, the third switch S3a, and the fourth switch S4a. 
The first control signal Sca1 and the second control signal Sca2 are a complementary low-frequency signal pair. When the AC output voltage Vac is under a positive half-cycle operation (during a time interval between time t0 and time t1), the first control signal Sca1 turns on the first switch S1a and the second control signal Sca2 turns off the second switch S2a, and the third control signal Sca3 turns off the third switch S3a and the fourth control signal Sca4 controls the fourth switch S4a in the high-frequency switching manner. When the AC output voltage Vac is under a negative half-cycle operation (during a time interval between time t1 and time t2), the first control signal Sca1 turns off the first switch S1a and the second control signal Sca2 turns on the second switch S2a, and the third control signal Sca3 controls the third switch S3a in the high-frequency switching manner and the fourth control signal Sca4 turns off the fourth switch S4a. 
However, the leakage current Icp1, Icp2 would be rapidly changed once the parasitic capacitance voltages of the parasitic capacitances Cp1, Cp2 significantly change because of the large variation of the AC output voltage Vac of the dual-buck inverter. That is, the leakage current gets larger as the variation of the parasitic capacitance voltage gets larger.
Accordingly, it is desirable to provide a power conversion system and a method of operating the same to control a dual-buck inverter having two conversion circuits and two filtering circuits so as to provide energy-storing and energy-releasing loops of output inductors and connect the filtering circuits to a neutral point at a DC input side, thus significantly reducing leakage current of a DC input voltage caused by parasitic capacitance voltage.